Question: (g) Optimize the assembly code in order to reduce the number of stall cycles. You are allowed to reorder, add, or remove ADD and MUL

 (g) Optimize the assembly code in order to reduce the number

(g) Optimize the assembly code in order to reduce the number of stall cycles. You are allowed to reorder, add, or remove ADD and MUL instructions. You are expected to achieve the minimum possible execution time. Make sure that the register values that the optimized code generates at the end of its execution are identical to the register values that the original code generates at the end of its execution. Justify each individual change you make. Show the execution timeline of each instruction and what stage it is in.

3 Pipeline (Reverse Engineering) Ei E3 W The following piece of code runs on a pipelined microprocessor as shown in the table (F: Fetch, D: Decode, E: Execute, M: Memory, W: Write back). Instructions are in the form Instruction Destination,Source1, Source2." For example, "ADD A, B, C" means A + B + C. Cycles 11 7 8 9 10 11 12 13 14 15 16 17 18 0 MUL R5, R6, R7 FD 12 E4 MW ADD R4, R6, R7 E3 M ADD R5, R5, R6 E2 E3 MUL R4, R7, R7 E2 M W ADD R6, R7, R5 D Ei E3 M ADD R3, RO, RO F E2 E3 M W ADD R7, R1, R4 F D E2 E3 M W Use this information to reverse engineer the architecture of this microprocessor to answer the following questions. Answer the questions as precisely as possible with the provided information. If the provided information is not sufficient to answer a question, answer "Unknown and explain your reasoning clearly. SOSISK M E3 W E4 E2 W BGA 3 Pipeline (Reverse Engineering) Ei E3 W The following piece of code runs on a pipelined microprocessor as shown in the table (F: Fetch, D: Decode, E: Execute, M: Memory, W: Write back). Instructions are in the form Instruction Destination,Source1, Source2." For example, "ADD A, B, C" means A + B + C. Cycles 11 7 8 9 10 11 12 13 14 15 16 17 18 0 MUL R5, R6, R7 FD 12 E4 MW ADD R4, R6, R7 E3 M ADD R5, R5, R6 E2 E3 MUL R4, R7, R7 E2 M W ADD R6, R7, R5 D Ei E3 M ADD R3, RO, RO F E2 E3 M W ADD R7, R1, R4 F D E2 E3 M W Use this information to reverse engineer the architecture of this microprocessor to answer the following questions. Answer the questions as precisely as possible with the provided information. If the provided information is not sufficient to answer a question, answer "Unknown and explain your reasoning clearly. SOSISK M E3 W E4 E2 W BGA

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