General Statement You are to design and implement a sequential circuit that functions as an implementation non-overlapping sequence detector. The sequence detector will have an input X that will be used to detect the non-overlapping sequence of your ACSII code. The output Z is to become 1 upon completion of the correct input sequence and is 0 otherwise. Your circuit will have a Mealy implementation. There is a clock input to the sequence detector is to be provided by "debounced" function generator of the simulator CLK EN Figure 1 Block diagram of ACSII code detection. lo D OL O0 lo The report should include the following Choice of flip flop for the circuits implementation. . . Timing diagram simulation and verification TASK: You are required to design and construct the circuit using any of simulation software to simulate the circuits