Given Base CPI$($Cycles per instruction$)=1,$ clock frequency $=$ F GHz$,$ Miss rate for L$2$ cache $=$M$\%,$ access time of

L$2$ cache $=$ A ns Miss rate for L$3=$N$\%,$ access time for L$3$ cache$=$B ns

Main memory access time $=$ C ns

We have two memory system:

System $1-$ with L$3$ cache only

System $2-$with a L$3$ cache and L$2$ cache