Groups will create a Lead$-$Lag controller for the system with transfer function:G$=2($s$+15)/(($s$+5)($s$+3)($s$+19)$The allowable steady state error is $10\%$ for a step input.The Time to first peak must be less than $0\mathrm{.}7$s and the allowable overshoot is $15\%.$ The system settling time must be less than $0\mathrm{.}51$ s$.$The design sequence to follow should be to correct the steady state error $($lag or pure gain$)$ then design a lead controller for the resulting system.Assignment deliverables:Your Matlab $/$ Simulink files used to perform the designBode Plots for the Lag controller designCalculations for the Lead design $($paper based calculations can be scanned and uploaded as Lag controller calculations and Lead controller calculations. Include with the calculations the reasoning behind choosing $($or assuming$)$ any values like the Lag upper frequency etc as well as the decisions made during the design..Images of the open loop and closed loop step responses capturing the above requirements.