Question: Hello. I'm supposed to write a code in verilog to implement this ALU. The ALU should perform 10 functions on 8 but inputs and will
Table 1: Arithmetic Logic Unit 1 Alu Ctrl Instruction Operation (Mnemonic) Loads ACCA with the value on the Data bus. Z changes to 1 if ResultO. (Load ACCA fron Data) Adds the value on the Data busto, the value in ACCA and saves the result in ACCA. C is the carry (out) from addition and Z is set if the result is 0. (Add ACCA and Data) LDDA ADDA Subtracts the value on the Data bus from the value in ACCA and saves the result in ACCA. C is the carry (in) from subtraction and Z is set if the result is 0. (Subtract value in Data from ACCA) SUBA Perforn a bitwise AND of the value on the Dat a bus with the value in ACCA. Save the result in ACCA. C should be the logical AND of th value on the Data bus with the value in ACCA. Z is set if the result is 0. (AND of ACCA and value on Data) Perform a bitwise OR of the value ou the Data Ibus with the value in ACCA. Save the result in ACCA. C should be the logical OR of the value on the Data bus with the value in ACCA. Z is set if the result is 0. (OR of ACCA and value on Data) ANDA ORAA Replace the value in ACCA with its one's complement. C is set to 1 and Z is set if the result is 0. (Compliment ACCA) Increment value in ACCA. Z is set if the result is 0. (INCA ACCA COMA (INCA LSLA Logical shift left of ACCA. C is set to the previous MSB of ACCA and Z is set if the result is 0. (Logical shift left ACCA) Logical shift right of ACCA. C is set to the previous LSB of ACCA and Z is set if the result is 0. (Logical shift right ACCA) LSRA Arithmetic shift right of ACCA. C is set to the previous LSB of ACCA and Z is set if the result is 0. (Arithmetic shift right ACCA) Zero the value of ACCA. C is set to 0 and Z is set to 1. (Zero ACCA) ASRA ZERO RST Reset ACCA to OxFF. C is set to 0 and Z is set to 0. (Reset ACCA
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