Hello, please help with the following verilog problem:

It is desired to design the following digital circuit using hierarchical Verilog code in order to display the result of the full-adder in a 7-segment display.

-Write the Verilog code for the full-adder module

-Write the Verilog code for the BCD converter module

-Write the Verilog code for the top-level module

PLEASE MAKE SURE THE CODE WORKS AND PROVIDE SIMULATION WAVEFORMS

Thank you.

BCD Converter Full-Adder 9 WO in S0