Question: ( i 1 ) foo: fld f 0 , 0 ( x 1 ) ; load X ( i ) to Reg ( f 0
i foo: fld fx ; load Xi to Regf
i fmul.d f f f ; Regf aXi
i fld fx ; load Yi to Regf
i fadd.d f f f ; Regf aXi Yi
i fsd fx ; store Regf to Yi
i addi x x ; increase X index
i addi x x ; increase Y index
i sltu x x x ; test: continue loop?
i bnez x foo ; loop if needed
Show how the loop would look both unscheduled by the compiler and after compiler scheduling, including any stalls or idle clock cycles. What is the execution time in cycles per element of the result vector Y unscheduled and scheduled?
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