Implement an illegal instruction exception in the multi-cycle datapath. Your answer must include the following

a. Figure of the multi-cycle datapath with all of the modifications clearly marked.

b. Assume a sequencer implementation with a ROM.

1. Show updates to the controller ROM

2. Updates to the dispatch tables

3. Any other additions as necessary

c. Explain in a few sentences how the implementation will work.

Multi-cycle Datapath & Control PCWrite lorD Outputs ALUSrcB MemRead MemWrite Control ALUSrCA RegWrite MemtoR Op RegDst Instruction [25-0 address [31-0] left 2 Instruction [31-26] Instruction [25-21] Instruction [20- 16] Instruction PC PC 131-28 Read register 1 Read Read register 2 data 1 Write register data 2 Write Address Zero ALU ALU result ALUOut Registers Read 15-0]Instruction 0 Write data 15-11 Lu register data Instruction 115-0] data 16 32 ALU Shift left 2 instruction [5-0] Multi-cycle Datapath & Control PCWrite lorD Outputs ALUSrcB MemRead MemWrite Control ALUSrCA RegWrite MemtoR Op RegDst Instruction [25-0 address [31-0] left 2 Instruction [31-26] Instruction [25-21] Instruction [20- 16] Instruction PC PC 131-28 Read register 1 Read Read register 2 data 1 Write register data 2 Write Address Zero ALU ALU result ALUOut Registers Read 15-0]Instruction 0 Write data 15-11 Lu register data Instruction 115-0] data 16 32 ALU Shift left 2 instruction [5-0]