Implement the finite state machine given below using minimum number of $D$ flip$-$

flops and one $8$ by $3(8$ row, $3$ column$)$ ROM with $3$ bit address input and $3$ bit data output. It is

assumed that chip select $($CS$)$ and output enable $($OE$)$ inputs of this ROM are always $1,$ therefore

they are not shown in the ROM chip symbol given below. Input is I bit output is $1$ bit States

are represented by binary numbers ab$.$t

You must show how the ROM chip on the left is connected to your FFs$.$ Address bits of the ROM

are $y_2{y}_1{y}_0.$ Data output bits of the ROM are $z_2{z}_1{z}_0.$ You must fill the cells of the ROM given on

right with correct binary values.