$-$ Implement the MIPS $\backslash (\backslash$mathbf$\{$j$\}\backslash )$ instruction. This instruction is quite a bit different from the others in that it is the first JTYPE instruction to be implemented. Recall that the $\backslash (\backslash$mathbf$\{$j$\}\backslash )$ instruction uses the bottom $26$ bits of the instruction word to hold the address to jump to$,$ while the OP field should have the value $6\text{'}$h$02.$ The MIPS instruction set specification allows these bottom $26$ bits to be extended to $32$ bits by leaving the top $6$ bits of the program counter unchanged $--$ which, given that your Verilog code is not implementing the full memory space, will always be $0$ suffice to say that $\backslash (\backslash$mathrm$\{$pc BranchZeroMux; does not currently take the possibility of a $\backslash (\backslash$mathbf$\{$j$\}\backslash )$ instruction into account.

Note that the memory interface in this Verilog implementation is reg $`$WORD m $`$MENT; and thus memory is indexed by addresses of $32-$bit words, not $8-$bit bytes, so the bottom two address bits are ignored. For example: assign ir$=$m$[$pc$>>2]$;$.$