Implement using VHDL the following bus bridge that converts a 4-bit bus to an 8-bit bus. Draw the hierarchy of the data path; the top-level entity should have the two main sub-entities Data path and control Unit. Implement your processor using VHDL. The data path implementation should be structural down to the third level. The control unit implementation should be behavioral. Test your VHDL code under Quartos in conjunction with Model Sim. The data path and the FSM of the bridge are as follows: Implement using VHDL the following bus bridge that converts a 4-bit bus to an 8-bit bus. Draw the hierarchy of the data path; the top-level entity should have the two main sub-entities Data path and control Unit. Implement your processor using VHDL. The data path implementation should be structural down to the third level. The control unit implementation should be behavioral. Test your VHDL code under Quartos in conjunction with Model Sim. The data path and the FSM of the bridge are as follows