Question: In a symmetric multiprocessor (SMP) system with a shared bus, there are two CPUs (CPU1, CPU2) that have local cache memories. The system does not

In a symmetric multiprocessor (SMP) system with a shared bus, there

are two CPUs (CPU1, CPU2) that have local cache memories. The system

In a symmetric multiprocessor (SMP) system with a shared bus, there are two CPUs (CPU1, CPU2) that have local cache memories. The system does not include a shared L2 cache For write operations, the Write Back (WB) method is used. There is a shared variable A in the system. To provide cache coherence, the snoopy MESI protocol is used. The parts a) and b) can be answered independently a) Assume that all cache memories are empty and the valid value of A is residing only in the main memory

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