In an 8-bit system, adding the signed integers 01000011 and 01000000 will result ir

A. Carry flag is set

B. Overflow flag is set

C. Zero flag is set

D. Carry and Overflow flags are set

5. A 2-way cache of 4 sets with LRU and block sequence access of B6, B15, B7, B13, B3 will have the

following blocks in Set#3

A. B6, B3

B. B15, B7

C. B7, B3

D. B15, B3

The DRAM memory cell requires refresh circuit because

(A) It has one transistor

(B) It has six transistors with lots of switching

(C) It has capacitor at the output

(D) It has RAS and CAS signals