Question: In SR latch design using NOR gates, the undefined state happen if O a. S=0 and R=0 b. S=1 and R=1 OC S=1 and R=0

In SR latch design using NOR gates, the undefined state happen if O a. S=0 and R=0 b. S=1 and R=1 OC S=1 and R=0 d. S=0 and R= 1
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