In this exercise, we will look at the different ways capacity affects overall performance. In general, cache access time is proportional to capacity. Assume that main memory accesses take $70$ ns and that memory accesses are $36\%$ of all instructions. The following table shows data for L$1$ caches attached to each of two processors, P$1$ and P$2.$

We will consider the addition of an L$2$ cache to P$1$ to presumably make up for its limited L$1$ cache capacity. Use the L$1$ cache capacities and hit times from the previous table when solving this problem. The L$2$ miss rate indicated is its local miss rate.

$[5]<5\mathrm{.}4>$ Assuming a base CPI of $1\mathrm{.}0$ without any memory stalls, what is the total CPI for P$1$ with the addition of an L$2$ cache?