In this lab you will build an 8-bit Arithmetic Logic Unit (ALU) by putting together 8 ALU bit-slices. You just need to build an ALU bit-slice and show how 8 of these are put together. An ALU consists of an arithmetic unit and a logic unit. You will design the arithmetic and logic units separately. A 2:1 Mux will select the result from the appropriate unit. Heres a block diagram of an ALU bit-slice.

A and B are the inputs, each 8-bits wide. There are two control lines. Depending on the values of the control lines, the ALU will either ADD, SUBTRACT, bitwise AND, or bitwise OR the inputs.

There are three status outputs as well as the main result. The status bits indicate if

• the result was zero,
• was there a carry,
• did the operation result in an overflow?

Carry: was there a carry in the most-significant bit which we could not output in the given number of bits (8 bits in this case).

Overflow: does the sign of the output differ from the inputs, indicating (for example) that a sum of two positive numbers has overflowed and the result is now negative!

The ALU will use the basic logic components: AND, OR, NOT, XOR gates and multiplexers. The two control lines select which operation is sent to the output

as shown in this table:

C1	C0	Result
0	0	A and B
0	1	A or B
1	0	A + B
1	1	A - B

Subtraction

You will use the 8-bit full-adder to also perform subtraction by complimenting one of its inputs. Assuming twos-complement arithmetic, the operation

A - B can be written as A + () + 1

You do this by setting the initial carry-in to 1 instead of 0, thus adding an extra 1 to the sum by using XOR gates, as shown below:

Overflow output

• Overflow occurs when the size of the inputs is such that there is a carry which changes the most-significant sign bit.

• The ALU will always output both carry and overflow, but both only makes sense when the operation is add or subtract. This is only implemented in

the Arithmetic unit

• Carry and overflow outputs have no meaning in the logical operations (AND and OR).

• The logic is follows: when adding, if the sign of the two inputs is the same, but the result sign is different, then we have an overflow.

• We have to do this only for addition, so we take the B₇ value after the XOR gate, i.e. just as it goes into the most-significant adder.

• The boolean expression is:

..result₇ + A₇.B₇.

Zero Output

• Is the result zero?
• This is only true if all of the bits of the result are zero. You can do this for the logical and the arithmetic units.
• To do this, use a 8-bit OR gate followed by a 1-bit NOT gate.

Notice that all three units can operate in parallel.

Test the ALU in the simulator.

What to submit?

1. Truth table for the full-adder.
2. Logic circuit for the ALU bit slice.
3. Block diagram showing the 8-bit ALU built from 8 bit-slices showing all inputs & outputs.
4. Test the ALU in the simulator by performing the following operations:
   1. 2+3
   2. 7-3
   3. 11011101 AND 11111111
   4. 11001100 OR 00100010

Test results