In this question we will analyze how a MIPS instruction goes through the single cycle datapath from beginning to end, and predict the values on the datapath as this instruction executes. The process is similar to the discussion in the Single Cycle Datapath tutorial. The instruction we will use is the shift-left-logical-variable (it is an R-type instruction summarized in table B.2 of the appendix B). The specific MIPS instruction is - sllv$s3, $s 1, $s2 Fill the blanks below - (1) Instr15:0 in other words the 5th to the oth bits of the instruction which enters the Control Unit as the Funct input is (write the 6-bit sequence in the blank space). (2) The other input to the Control Unit comes from Instr 31:26] which in this case = (write the 6-bit sequence in the blank space). (3) Instr[25:21) = (write the 5-bit sequence in the blank space). Hint: this is a register number. Find the register from the instruction and look up its number from Table 6.1. In this question we will analyze how a MIPS instruction goes through the single cycle datapath from beginning to end, and predict the values on the datapath as this instruction executes. The process is similar to the discussion in the Single Cycle Datapath tutorial. The instruction we will use is the shift-left-logical-variable (it is an R-type instruction summarized in table B.2 of the appendix B). The specific MIPS instruction is - sllv$s3, $s 1, $s2 Fill the blanks below - (1) Instr15:0 in other words the 5th to the oth bits of the instruction which enters the Control Unit as the Funct input is (write the 6-bit sequence in the blank space). (2) The other input to the Control Unit comes from Instr 31:26] which in this case = (write the 6-bit sequence in the blank space). (3) Instr[25:21) = (write the 5-bit sequence in the blank space). Hint: this is a register number. Find the register from the instruction and look up its number from Table 6.1