Include a 2-input NAND gate in the register of Fig. 6.1 and connect the gate output to
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Include a 2-input NAND gate in the register of Fig. 6.1 and connect the gate output to the C inputs of all the flip-flops. One input of the NAND gate receives the clock pulses from the clock generator, and the other input of the NAND gate provides a parallel load control. Explain the operation of the modified register. Explain why this circuit might have operational problems.
Related Book For
Vector Mechanics for Engineers Statics and Dynamics
ISBN: 978-0073212227
8th Edition
Authors: Ferdinand Beer, E. Russell Johnston, Jr., Elliot Eisenberg, William Clausen, David Mazurek, Phillip Cornwell
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