It is suggested that directory-based cache coherence can scale with the aid of a hierarchy of on-chip caches. For example, we could group 64 cores into 8 clusters of 8 cores each. Each processor has its own private cache and each cluster has its own shared inclusive “cluster” cache. The chip also contains a shared inclusive Last-Level Cache (LLC). We assume sharers are tracked precisely. Describe how the cache hierarchy can be exploited to reduce the storage cost of tracking sharers.

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