Question: LOGIC DESIGN QUESTION Given the two Boolean functions F and G below. You are asked to compare the gate input cost of their implementation using

LOGIC DESIGN QUESTION

LOGIC DESIGN QUESTION Given the two Boolean functions F and G below.

You are asked to compare the gate input cost of their implementation

Given the two Boolean functions F and G below. You are asked to compare the gate input cost of their implementation using optimised sum-of-products form and hierarchical design approach. F(A,B,C,D) = AB+ (T+ D)(A + D)) G(A,B,C,D) = (CD+AD B+BD (d) In hierarchical approach, Boolean functions F and G are implemented using THREE copies of a suitable hierarchical component which is represented by Boolean function H(X,Y,Z). (i) Write down the Boolean expression for the hierarchical function H, and draw the logic circuit diagram of such hierarchical component. (ii) Rewrite the functions F and G in a form that the hierarchical function H is used twice for each function. Put your answers in the format F = H (...) and G = H...). (iii) Draw a diagram to show the hierarchical implementation of F and G. Use graphical symbols to represent the hierarchical component in your answer. (iv) Find the gate input cost (not counting the cost for inverters) for the implementation of F and G respectively using your results in part (iii) above

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