Question: Looking at the diagram below, why is it important to add the latch to IO/M', RD', and WR' when it doesn't do any demultiplexing? IOM

Looking at the diagram below, why is it important to add

Looking at the diagram below, why is it important to add the latch to IO/M', RD', and WR' when it doesn't do any demultiplexing? IOM OE TOM RD WR RD WR Buffered control hus OE A A. A A. 373 G 8088 A A, Ae A A A *244 Buffered address OE A A A ALE 373 A, AD, AD AD AD AD AD AD AD DT/R DEN Buffered data A 245 D, D D D D D D D B G DIR

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