( Loop unrolling and instruction reordering ) Given the code segment shown below, assume we use a...
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Question:
Loop unrolling and instruction reordering Given the code segment
shown below, assume we use a conventional stage pipeline. Loaduse would
cause cycle pipeline stall, and branches are resolved at the instruction decode
stage. Registers St ~ St are for temporal use. Please answer the following
questions.
Loop: lw $to$s
addu $t St $s
SW $t$s
add $s $s
bne $s Szero, Loop
a pts Without loop unrolling and instruction reordering, how many
needed to execute four iterations?
b pts With loop unrolling that unrolls the loop four times and instruction
reordering, how many cycles are required to execute fous iterations?
Related Book For
Computer Architecture A Quantitative Approach
ISBN: 9780128119051
6th Edition
Authors: John L. Hennessy, David A. Patterson
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