Many parallel processing applications require a class of operations implemented as sequences of microoperations that are executed as an indivisible set $($indivisible or atomic operations$).$ This means that during the execution of these operations, no extraneous microoperations are allowed to be interpolated between the microoperations of the sequence. One way to implement such indivisible operations is through machine instructions of the architecture, so that a single instruction can completely execute such a sequence.

Consider the DPU of the simplified MIPS architecture of multiple machine cycles per instruction cycle, with control of both hard$-$wired and microprogrammed logic, and implement in it $$ for each control case $$ the integer instruction:

cmpm&swap $rd$,$$ru$,($$rt$),($$rs$)$

which, given two memory locations and a number, performs the operation described by the following steps:

$1.$ Reads the memory location referenced by indirect addressing without shifting via the $rs register.

$2.$ Reads the memory location referenced by indirect addressing without shifting via the $rt register.

$3.$ Compares the two values $$read from memory.

$4.$ If the two values $$are equal, swaps the value of the first memory location with

the value of the $ru register.

$5.$ Stores the logical result of the comparison in $rd$.$

To implement the cmpm&swap command, modify the data paths and input options of the DPU modules appropriately, expanding or adding multiplexers where necessary. However, you cannot add modules or special purpose registers, but you can add write permissions to existing registers.