Must be done individually no teamwork Problem 1. Exploring Instruction Flow and and Instruction level paralelism ILP Consider the following pseudo-assembly code. Top: A. LOADRI - Mem[1234) B. LOAD R2 = Mem[42] C ADDR4-RI+R2 D. LOAD R3 - Mem[1976) E BEO R4,0, Foo F. SUBRI-R3.1 G. XOR RS - R1 Oxffime H. ADD RIRI+1 I. JUMP Bar Foor J. LOAD R3 - Mem[2000] K. ADD R2 -R4+#13 LMUL R3-R3 x R2 Bar: M. ADD R2 R4 R5 N. SUB R4-RI- 0. XORRI-R3 Oxf0f0f00 Calculate the ILP for each of the following scenarios. Use a table to record the relevant dependencies as part of your answer. A sample table is provided at the end of this problem a Observe all register data (RAW, WAR, WAW) and control dependencies and assume the conditional branch (statement is not taken falls through to?). b. Repeat () but only for true dependencies and no control dependencies;le, (f) will be executed in the instruction stream Repeat al but only for true dependences (no control dependencies and assuming () is taken branch to HINT: The intention of the problem is not to use a specific pipeline. It is however, to identify different kinds of data dependences and the degree of LP instruction Level Parallelism) achievable Normally you want do this graphically using a data flow graph. Where a node of the graph is one instruction (A, B, C, ...) and you have a directed edge from one node to the other if there is a dependence. You may want to use a different color for different dependence types. Once you have the graph, you can find out what would be the maximum parallelism you would obtain for that graph (computation) if you had all the hardware you needed. So then the depth of the data flow graph gives us the minimum execution time possible for the graph. The total number of instructions in the graph will give up the execution time with out any extra hardware. This means everything must be executed sequentially and one at a time. Then ILP is defined as = (Number of instructions in dataflow graph)/(depth of dataflow graph). Sample table to produce to show your work for each senarion: If there is a RAW dependency between A and C and WAR dependency between F and then RAW WAR WAW (A-C F-C Must be done individually no teamwork Problem 1. Exploring Instruction Flow and and Instruction level paralelism ILP Consider the following pseudo-assembly code. Top: A. LOADRI - Mem[1234) B. LOAD R2 = Mem[42] C ADDR4-RI+R2 D. LOAD R3 - Mem[1976) E BEO R4,0, Foo F. SUBRI-R3.1 G. XOR RS - R1 Oxffime H. ADD RIRI+1 I. JUMP Bar Foor J. LOAD R3 - Mem[2000] K. ADD R2 -R4+#13 LMUL R3-R3 x R2 Bar: M. ADD R2 R4 R5 N. SUB R4-RI- 0. XORRI-R3 Oxf0f0f00 Calculate the ILP for each of the following scenarios. Use a table to record the relevant dependencies as part of your answer. A sample table is provided at the end of this problem a Observe all register data (RAW, WAR, WAW) and control dependencies and assume the conditional branch (statement is not taken falls through to?). b. Repeat () but only for true dependencies and no control dependencies;le, (f) will be executed in the instruction stream Repeat al but only for true dependences (no control dependencies and assuming () is taken branch to HINT: The intention of the problem is not to use a specific pipeline. It is however, to identify different kinds of data dependences and the degree of LP instruction Level Parallelism) achievable Normally you want do this graphically using a data flow graph. Where a node of the graph is one instruction (A, B, C, ...) and you have a directed edge from one node to the other if there is a dependence. You may want to use a different color for different dependence types. Once you have the graph, you can find out what would be the maximum parallelism you would obtain for that graph (computation) if you had all the hardware you needed. So then the depth of the data flow graph gives us the minimum execution time possible for the graph. The total number of instructions in the graph will give up the execution time with out any extra hardware. This means everything must be executed sequentially and one at a time. Then ILP is defined as = (Number of instructions in dataflow graph)/(depth of dataflow graph). Sample table to produce to show your work for each senarion: If there is a RAW dependency between A and C and WAR dependency between F and then RAW WAR WAW (A-C F-C