Need help on Problem 7

Note that simulation is not required for the following questions, but you'll get 5 pts as bonus for each question if you do it (15 pts bonus in total. Show the screenshot of your code/testbench and simulation results, i.e., waveform). 5 Write a behavioral description for a 4-to-1 multiplexer. The multiplexer has 'sl' and 'so' select inputs and four data inputs 'a', 'b', 'c', and 'd'. (20 pts) 6 Using an assign statement describe a majority circuit with one output 'w' and three inputs 'a', 'b' and 'c'. When the majority of the inputs are 1, the output of the majority circuit becomes 1. (20 pts) 7 Write a Verilog description for a 101 sequence detector with an input 'a' and an output 'w'. (20 pts)