Need help with part $2.$ Make a truth table and reduce that to a logic expression. Then build the circuit using AND gates and OR gates.

Specifications: Part$-2$ Part$-2$: Description In this part of the lab we will illuminate two $7-$segment displays. You will need tInterface $($do not edit the content inside this box$).$ Inputs in $3$ in$3$ in $2$ in$2$ in $1$ int ino Dino Outputs: sign sign seg sege sPart$-2$: Example $=$ In the figure above, the input is $\{$in$3,$ in$2,$ ini, ino$\}\{0,0,1,1\}$ which is the $2$s complement binary repr

Specifications: Part$-2$ Part$-2$: Description In this part of the lab we will illuminate two $7-$segment displays. You will need to understand $2\text{'}$s Complement to determine when the values correspond to a negative or positive number. Your circuit must accept a $4-$bit $2\text{'}$s complement input $\{$in$3,$ in$2,$ ini, ino$\}$ where in$3$ is the most significant bit and ino is the least significant bit. The outputs of your circuit must illuminate the two $7-$segment displays such that they display the decimal value of the input. Part$-2$: User Interface You are provided an interface file lab$2\_$part$2.$dig, start Part