number 3

3) Write a program using these instructions, this is not a Verilog program but a program that would run on an MCU that had this instruction set Opcode Task to be executed 0001 0010 ADD ription contents of RD RA,RB) (load immediate) contents of RD (contents of RA) + (contents of RB) contents of RD (contents of RA) + RB (add immediate) contents of RD (contents of RA)- (contents of RB) contents of RD (contents of RA) OR (contents of RB) contents of RD (contents of RA) AND (contents of RB) contents of RD (contents of RA) XOR (contents of RB) contents of RD (contents of RB) +1 contents of RD (contents of RB-1 contents of RD =-(contents of RB) No Operation (do nothing during this instruction cycle) Jump to immediate address location (RA,RB) for the next instr contents of RD (contents of RA) (contents of RB) contents of RD-(contents of RA)/(contents of RB) If (contents RA)(contents of RB) increment PC by RD immed HALT program execution 100 UB OR AND OR NC EC 110 1000 1001 1010 1011 1100 1101 1110 OMP OP MP lul iv MPJ ALT Your program should calculate a Fibonacci sequence 10 values long. Remember Fibonacci numbers, FIn]-FIn-1]+FIn-2]. Start with 0 and 1. So if F[o] 0, F[1]-1, then using this relationship F[2] = F [2-1] + F[2-21-1. These are the first 3 values. Write the program and what your program will calculate on each step Your answer should be a program written using the codes shown in the table above, and the result of each calculation 4) Write an instruction register module. It should be combinatorial, and not contain inferred latches. To show that it doesn't have inferred latches compile in Quartus prime and capture the number of errors and warnings. Be sure to use System Verilog