Obtain a minimal state table for a synchronous sequential circuit of Meoly$-$type with an input signal $($letter$\_$rec$),$ and an output signal $($output$).$ The input sequence will generate the output $1$ if it detects the string "Elixir" or "Elixon"

a$)$ Draw the state diagram. $(8$ points$)$

b$)$ Write FSM VHDL code for your design. $(8$ points$)$

c$)$ Force the synthesis tool to encode your FSM states to One hot Code? $(5$ points$)$

d$)$ Explain how encoding scheme can affect the area used by your design. Compare two encoding schemes: one$-$hot and binary. $(4$ points$)$