Please answer all questions.

Q1. Consider a small computing system with a customized 17 bits ISA CPU for the following MIPS Codes: Iw $t0, 0($zero) % load x from Memory add $t1, $zero, $zero add $t2, szero, $zero (a) Develop the complete single cycle datapath that can execute the above instructions. Show the connectivity, the bus width of the connections in bit(s). (5 marks) (b) Calculate the total execution time for the CPU , which is designed for single cycle operation with the following assumptions- (5 marks) Given that 3 ns for memory access, 2 ns for ALU operation, 1 ns for register read or write Given that MIPS instruction mix 23% loads, 13% stores, 19% branches, 2% jumps, 43% ALU