PLEASE ANSWER ASAP COMPUTER SCIENCE DIGITAL SYSTEM

Convert a 6-bit adder/subtractor to an unsigned full comparator with one output, A = B, where A and B are the two 6-bit operands. 7- Complete the following VHDL code to implement the most cost-effective circuit for the function f(x_1, X_2, x_3) = sigma m(0, 3, 4, 5, 6). Show all your work. ENTITY test IS PORT (x1, x2, x3: IN BIT; f: OUT BIT); END test; ARCHITECTURE LogicFunc OF test IS BEGIN