please do 1.4.3-1.4.6 step by step.

Exercise 1.4 Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The dock rate and CPI of each implementation are given in the following table. Clock rate CPI Class A CPI Class B CPI Class C CPI Class D P1 1 2 1.5 GHz 2 GHz 1.4.1 (10) Given a program with 10 instructions divided into dasses as follows: 10% class A, 20% class B, 50% class C and 20% dass D, which implemen- tation is faster? 1.4.2 (5) What is the global CPI for each implementation? 1.4.3 (5) Find the clock cycles required in both cases. The following table shows the number of instructions for a program. Arith Store Load Branch Total 500 T50 50 100 700 1.4.4 (5) Assuming that arith instructions take I cycle, load and store 5 cycles and branch 2 cycles, what is the execution time of the program in a 2 GHz processor? 1.4.5 [5] Find the CPI for the program. 1.4.6 (10) If the number of load instructions can be reduced by one-half, what is the speed-up and the CPI