Consider two different implementations of the same instruction set architecture $($ISA$).$

The

instructions can be divided into four classes according to their CPI $($class A$,$ B$,$ C$,$ and D$).$ P$1$

with a clock rate of $2\mathrm{.}5$ GHz have CPIs of $1,2,3,$ and $3$ for each class, respectively. P$2$ with a

clock rate of $3$ GHz and CPIs of $2,2,2,$ and $2$ for each class, respectively.

Given a program with a dynamic instruction count of $1,000,000(1\mathrm{.}0*10^6)$ instructions divided

into classes

as follows: $10\%$ class A$,20\%$ class B$,50\%$ class C$,$ and $20\%$ class D$,$ which implementation is

Faster?

a$.$ What is the global CPI for each implementations?

b$.$ Find the clock cycles required in both cases