please help me with the question in computer architecture, thanks alot

Given the following single cycle MIPS processor architecture. Instruction [25-01 Jump address (31-0) Shift 26 left 2 28 PC 4131-28) Add 4 >Add Shift left 2 RegDst Jump Branch MemRead Instruction (31-26] Momio Reg Control ALUOP MemWrite ALUSIC RegWrite Instruction (25-21) Read PC Read address register 1 Read Instruction (20-16] Zero data 1 Read register 2 Writo Read data 2 >ALU ALU Instruction (31-0) Instruction memory Read Address data result Instruction (15-11) register Write data Registers Write Data data memory Instruction (15-0) 16 32 Sign- extend ALU control Instruction (5-01 Figure 1: Full datapath of a single cycle MIPS processor Assume that $80 and $s1 registers store two integer numbers 100 and 200, respectively. The memory word at address 300 keeps an integer number 2019. Question 1. With each instruction below, please identify which functional units will participate into the processing of the instruction. What are values of the inputs and outputs of those functional units? Identify values of control signals for each instruction. a. add $s 0, $ 0, $s1 b. addi $sl, $s 0, 5 c. lw $0, 100 ($s1) d. sw $s0, 100 (Ss1) che following single cycle MIPS processor architecture. Instruction (25-01 Sizin Jump address (31-0) 26 PC +4 (31-28) Add EX xcs Add Shift left 2 RegDst Jump Branch Mem Read Instruction (31-26] Momto Reg Control ALUO MemWrite ALUSC RegWrite Instruction (25-21] PC Read address Instruction (20-16) Read register 1 Read Read data 1 register 2 Write Read Zero ALU ALU M Instruction (31-0) Instruction memory Address Read data Forox result Instruction (15-11) register data 2 Write data Registers Write Data data memory Instruction (15-0) 16 32 Sign- extend ALU control Instruction (5-01 Given the following single cycle MIPS processor architecture. Instruction [25-01 Jump address (31-0) Shift 26 left 2 28 PC 4131-28) Add 4 >Add Shift left 2 RegDst Jump Branch MemRead Instruction (31-26] Momio Reg Control ALUOP MemWrite ALUSIC RegWrite Instruction (25-21) Read PC Read address register 1 Read Instruction (20-16] Zero data 1 Read register 2 Writo Read data 2 >ALU ALU Instruction (31-0) Instruction memory Read Address data result Instruction (15-11) register Write data Registers Write Data data memory Instruction (15-0) 16 32 Sign- extend ALU control Instruction (5-01 Figure 1: Full datapath of a single cycle MIPS processor Assume that $80 and $s1 registers store two integer numbers 100 and 200, respectively. The memory word at address 300 keeps an integer number 2019. Question 1. With each instruction below, please identify which functional units will participate into the processing of the instruction. What are values of the inputs and outputs of those functional units? Identify values of control signals for each instruction. a. add $s 0, $ 0, $s1 b. addi $sl, $s 0, 5 c. lw $0, 100 ($s1) d. sw $s0, 100 (Ss1) che following single cycle MIPS processor architecture. Instruction (25-01 Sizin Jump address (31-0) 26 PC +4 (31-28) Add EX xcs Add Shift left 2 RegDst Jump Branch Mem Read Instruction (31-26] Momto Reg Control ALUO MemWrite ALUSC RegWrite Instruction (25-21] PC Read address Instruction (20-16) Read register 1 Read Read data 1 register 2 Write Read Zero ALU ALU M Instruction (31-0) Instruction memory Address Read data Forox result Instruction (15-11) register data 2 Write data Registers Write Data data memory Instruction (15-0) 16 32 Sign- extend ALU control Instruction (5-01