please I need help.

No. 4 (5 points) Compute ALU self-bypass pa 1000 p, the pulsed latch has a pulse width of 50 ps, a setup time of 70 ps, a hold time of 5 ps, a clk-to-Q propagation delay of 82 ps and contamination delay of 52 ps, a D-to-Q propagation delay of 92 ps. th cycle time: Logic propagation delay is