Question: please solve part a,b,c (a) What is the input width of the decoder used in a k1 multiplexer? (b) Draw a schematic diagram of the
(a) What is the input width of the decoder used in a k1 multiplexer? (b) Draw a schematic diagram of the 1-bit ALU for \{and, or, add, sub, nor, slt, overflow_checking(details)\}. (c) Consider the 1-bit ALU in (b) and show control signal names and values (total 4 bits) for Sub, Nor and Slt. (d) Write the logic equation of the 2 -input XOR component and draw the corresponding schematic diagram
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