Problem 1

(40 Points) Design a MIPS processor supporting only the R-type and the liw rd, rs, rt instructions. The liw rd, rs, rt instruction does the following: The rd register is set to be the memory content at the address obtained by the sum of the values in rs and rt. For example, liw $2, $3, $4 If rs and rt are 4000 and 4800 respectively, rd is set to be the value loaded from memory address 8800. Assume the opcode of R-type is 000000 and that liw is an R-type instruction, but the opcode of liw is 100000.

b) (10 points) Consider the control signals for the 2-1 MUX. Fill in the following table (you should not need more than 4 2-1 MUXes). In the case of a dont care, write down a 0. Then determine the logic functions for each MUX. Specific bits in the instruction can be denoted as, for example, ins[31]. Make sure to label your MUXes correctly.

Problem 1 (40 Points) Design a MIPS processor supporting only the R-type and the liw rd, rs, rt instructions. The liw rd, rs, rt instruction does the following: The rd register is set to be the memory content at the address obtained by the sum of the values in rs and rt. For example, liw $2, $3, s4 If rs and rt are 4000 and 4800 respectively, rd is set to be the value loaded from memory address 8800 Assume the opcode of R-type is 000000 and that liw is an R-type instruc- tion, but the opcode of liw is 100000 b) (10 points) Consider the control signals for the 2-1 MUX. Fill in the following table (you should not need more than 4 2-1 MUXes). In the case of a "don't care", write down a 0. Then determine the logic functions for each MUX. Specific bits in the instruction can be denoted as, for example, ins/31]. Make sure to label your MUXes correctly R-type liw MUXCtrll MUXCtrl2 MUXCtrl3 MUXCtrl4 Problem 1 (40 Points) Design a MIPS processor supporting only the R-type and the liw rd, rs, rt instructions. The liw rd, rs, rt instruction does the following: The rd register is set to be the memory content at the address obtained by the sum of the values in rs and rt. For example, liw $2, $3, s4 If rs and rt are 4000 and 4800 respectively, rd is set to be the value loaded from memory address 8800 Assume the opcode of R-type is 000000 and that liw is an R-type instruc- tion, but the opcode of liw is 100000 b) (10 points) Consider the control signals for the 2-1 MUX. Fill in the following table (you should not need more than 4 2-1 MUXes). In the case of a "don't care", write down a 0. Then determine the logic functions for each MUX. Specific bits in the instruction can be denoted as, for example, ins/31]. Make sure to label your MUXes correctly R-type liw MUXCtrll MUXCtrl2 MUXCtrl3 MUXCtrl4