Question: Problem #1 : Complete the design of the 2 -bit fast adder presented in the class. Minimize the K-maps for the three outputs and draw

$Problem \#1 : Complete the design of the 2 -bit fast$

Problem \#1 : Complete the design of the 2 -bit fast adder presented in the class. Minimize the K-maps for the three outputs and draw the logic circuit. Problem \#2: Implement the 8-bit Ripple Carry Adder as a sequence of 1-bit Full adders and analyze the delays assuming each gate has a delay of . Show the hardware design of 1-bit adder, and a block diagram for the 8-bit blocks of the adder indicating how blocks connects to each other

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