Question: Problem #2 [25 pts] Consider the internal structure of the pseudo-CPU augmented with a Stack Pointer (SP) and a single-port register file containing 32 8-bit
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Problem #2 [25 pts] Consider the internal structure of the pseudo-CPU augmented with a Stack Pointer (SP) and a single-port register file containing 32 8-bit registers (RO-R31). Suppose the pseudo-CPU can be used to implement the AVR instruction CALL label (Long Call to a Subroutine). CALL label is a four-byte instruction. Give the sequence of microoperations required to Fetch and Execute CALL label. You may use registers RO and RI to store temporary values (the original values do not need to be preserved). Your solution should result in no more than 20 microoperations. You may assume the SP register has the car Assume the PC is currently pointing to the CALL instruction and MDR is 8-bits wide, and SP, PC, IR, and MAR are 16-bits wide. With this instruction, note that the upper 16 bits represent the opcode and the lower 16 bits represent the target address for the subroutine call. Assume that the Internal Data Bus is 16-bits wide and can handle 8-bit or 16-bit transfers in one microoperation. Clearly state any other assumptions made. 32-bit Opcode: 1001010000001110 kkkkkkkkkkkkkkkk ALU Register File R31 - RO AC Internal Data Bus CU Internal control signals To/from memory and 10 devices - External Control signals Problem #2 [25 pts] Consider the internal structure of the pseudo-CPU augmented with a Stack Pointer (SP) and a single-port register file containing 32 8-bit registers (RO-R31). Suppose the pseudo-CPU can be used to implement the AVR instruction CALL label (Long Call to a Subroutine). CALL label is a four-byte instruction. Give the sequence of microoperations required to Fetch and Execute CALL label. You may use registers RO and RI to store temporary values (the original values do not need to be preserved). Your solution should result in no more than 20 microoperations. You may assume the SP register has the car Assume the PC is currently pointing to the CALL instruction and MDR is 8-bits wide, and SP, PC, IR, and MAR are 16-bits wide. With this instruction, note that the upper 16 bits represent the opcode and the lower 16 bits represent the target address for the subroutine call. Assume that the Internal Data Bus is 16-bits wide and can handle 8-bit or 16-bit transfers in one microoperation. Clearly state any other assumptions made. 32-bit Opcode: 1001010000001110 kkkkkkkkkkkkkkkk ALU Register File R31 - RO AC Internal Data Bus CU Internal control signals To/from memory and 10 devices - External Control signals
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