Problem $2$

Consider a computer system with a multi$-$level cache architecture, which includes an $L1$ cache, an L$2$ cache, and main memory. The performance of this system heavily depends on the efficiency of its memory hierarchy. The following table provides the relevant parameters for each level of the memory system:

$\backslash$table$[[$Memory$,$Level Access Time,Hit Rate$],[$L$1$ Cache,$1ns,95\%$