Question: Problem 4 - 2 5 pts a . Reproduce the truth table of a 2 - bit unsigned comparator, shown below ( also refer to

Problem 4-25 pts
a. Reproduce the truth table of a 2-bit unsigned comparator, shown below (also refer to Section 6.2 of your textbook)(5 pts)
\table[[a1a0,b1b0,G E L],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,],[,,]]
b. We want to expand into a 4-bit comparator (shown above) using two such 2-bit comparators as in the previous step. Complete the truth table for the "wrap-around logic block". Hint: Remember that one and exactly one of the G, E, L outputs of a comparator is 1.(10 pts)
\table[[Gin_h, Ein_h, Lin_h,Gin_l, Ein_l, Lin_l,G E L],[,,],[,,]]
c. Implement the wrap-around logic for G,E,L using basic gates. (10 pts)
Problem 4 - 2 5 pts a . Reproduce the truth table

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