Problem 5 (40 points): Design two adders: a 64-bit ripple-carry adder and a 64-bit carry-look-ahead (CLA) adder with 4- bit CLA blocks. Let's assume that the 1-bit full adder and CLA logics are built from two-input logic gates only, where each two-input gate has an area of 15 and a propagation delay of 50 ps (a) Estimate the area and critical-path delay of a 64-bit ripple-carry adder. (15 points) (b) Estimate the area and critical-path delay of a 64-bit CLA adder. (15 points) (C) Compare the two adder design in a table and discuss the trade-offs between area and delay How do you choose between a carry-ripple and a CLA adder in practical design? (10 points) 2