Question: Give a circuit using only 2-input NAND gates, 2-input NOR gates, and inverters (NOT gates) that takes four inputs W,X,Y,Z and one output O described



Give a circuit using only 2-input NAND gates, 2-input NOR gates, and inverters (NOT gates) that takes four inputs W,X,Y,Z and one output O described by the Bookean expression (WX)(YZ) Problem 2 (12 points) Perform the addition 0b11011110+0b01101000 tsing 8-bit two's complement representation. and also give the equivalent computation in decimal. Use the figure to show your work. Problem 3 (24 Points) Consider a 12-bit floating representation that uses the leftmost bit for the sign, the next 4 bits for the exponent with a bias of 7 , and the rightmost 7 bits for the normalized mantissa. Part 1 (12 Points): Give the decimal equivalent of the folloming 12-bit flonting point numbers in hexadecimal: OxAC8 Part 2 (12 Points): Convert the decimal number 0.28125 to 12 -bit floating point representation in hexadecimal. Consider a Boolean function F(W,X,Y,Z) defined by the following truth table: Part 1 (12 Points): Give the simplest Sum-of-Products formula for F(I,X,Y,Z). Part 2 (12 Points): Give the simplest Product-of-Sums formula for F(W,X,Y,Z). Problem 5 ( 26 Points) Design at circuit that takes five inpat-bats b1,b2,,b5 representing the binary namber b3b4b1b2b1 and has five output bits c1,c2,c3 where crs4C3c2c1 is the two's complement of b3b4b3b2b1. For example, if the input was b3=1,b4=1,b1=0,b2=0,b1=1 which is 7 in two's complement, then the output would be cs=0,c4=0,c1=1,c2=1,c1=1 which is 7 in two's complement. Your circuit can use the half-adder and/or full-adder circuits that we designed in lecture
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