problems refer to a clock cycle in which the processor fetches the following instructions word:

10101100011000100000000000010100

Assume the data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

r0 r1 r2 r3 r4 r5 r6 r8 r12 r31

0 -1 2 -3 -4 10 6 8 2 -16

a. What are the outputs of the sign-extend and the jump of the sign-extend and the jump "Shift left 2" unit (near the top of the below figure for this instruction word is?

b. what are the values of the ALU control unit's inputs for this instruction?

c. What is the new PC address after this instruction is executed? Highlight the path through which this value is determined in the above figure.

d. For each Mux, show the values of the data output during the execution of this instruction and these register values.

e. For the ALU and the two add units, what are their data input values?

f. What are the values of all inputs for the "Registers" unit?

please show work, thank you