Q$2)$ Design a $2\backslash$times $2-$bit signed multiplier. The inputs to the multiplier are two $2-$bit sign$-$magnitude binary numbers.

The output is going to be a sign$-$magnitude binary number.

$($a$)$ Determine the number of output bits.

$($b$)$ Construct the truth table.

$($c$)$ For each output, draw the Karnaugh Map and find a simplified expression.

$($d$)$ Implement the circuit and reduce the cost by making use of components common to each output. Use

XOR$/$XNOR gates whenever possible.