Q$3$

Suppose that a computer has a processor with two L$1$ caches, one for instructions $($program codes$)$ and one for data. Let $\backslash (\backslash$tau $\backslash )$ be the access time for the two L$1$ caches, $\backslash (15\backslash$tau $\backslash )$ for transferring a block from L$2$ to L$1$ and $\backslash (130\backslash$tau $\backslash )$ for transferring a block from the main memory to L$1.$ Assume the hit rates are the same for instruction and that the hit rates in L$1$ and L$2$ caches are $0\mathrm{.}95$ and $0\mathrm{.}8$ respectively.

$-$ What fraction of accesses miss in both the L$1$ and L$2$ caches, thus requiring access to the main memory

$-$ What is the average access time as seen by the processor $?$