Question $1$:

a$)$ What needs to be stored inside a cache for block identification? How does a cache know whether there is a cache hit or miss?

b$)$ Explain the difference between Direct, associative, and set associative mapping $5$

c$)$ In the Intel $8086$CPU, there are eight $16-$bit general$-$purpose registers. What are these registers? Highlight the use of only three of them.

$[7]$