Question: Question 3 . 1 What is the clock cycle time with this improvement? ( hint: a block, for example ALU, is functional only if all

Question 3.1
What is the clock cycle time with this improvement?
(hint: a block, for example ALU, is functional only if all of
its inputs are ready; please pay attention to which input
arrives last.)
Question 3.2
If the delay caused by sign-extend unit is 220 ps. What
would be the clock-cycle time with this change? (the
delay caused by ALU is still 150+120 ps)
Question 3.3
If the delay caused by Control unit is 250ps and of ALU
Control unit is 100 ps. What would be the clock cycle
time with this change? (the delay caused by ALU is still
150+120 ps and the delay caused by sign-extension
unit is 220 ps)
1935 ps
1930 ps
1835 ps
2055 ps
Question 3 . 1 What is the clock cycle time with

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