Question $4$: Consider the single$-$cycle $8-$bit data path shown below. The A$/$B buses carry operand data from internal registers, and the R$-$bus carries result

data to be stored into internal registers. The control unit drives $3-$bit register select lines for each bus, sets the ALU function, and so on$.$ Write a short

program using a general$-$purpose register architecture to: $($a$)$ Evaluate the expression: $6+(2+3)**4-3[8$ marks$]($b$)$ Encrypt and decrypt a value stored in

a register using a simple XOR based symmetric encryption algorithm. $[12$ marks$]$ For both $($a$)$ and $($b$),$ indicate the control signals needed to perform each

instruction in your program and clearly explain your rationale including the registers $($RO$,$ R$1,$ R$2$ etc.$)$ you intend using.