Question $4$: Single Cycle Datapath Control $(12$ points$)$

We wish to support the MIPS instruction blez $($branch on less than or equal to zero$)$

as an I$-$type instruction in the modified single$-$cycle datapath below.

The blez instruction is with opcode $000110.$ It compares the values in the rs and

rt registers, where rt register is fixed to be $ zero in the instruction encoding.

If the value in register $rs$ is less than or equal to the value in register $rt($i$.$e$.$

$R[rs]0),$ it will use PC$-$relative addressing mode to calculate the branch target

address and update PC$,$ just like the beq instruction:

$PC=PC+4+$ BranchAddr

Otherwise $($i$.$e$.R[rs]>0),$ then:

$PC=PC+4$

Updates in the modified datapath above are marked in blue, including

a newly added $1-$bit control signal called blez;

a new output that extract bit $31($i$.$e$.$ sign bit$)$ from the ALU result;

and

a newly added OR gate being connected to PCSrc$.$