Question 4 The hypothetical MINE instruction set was implemented using a 400-MHz machine. The MINE instruction set has three classes of instructions called R. J and I. The implementation uses 4 clock cycles for R-class instructions, 3 clock cycles for J-class instructions, and 2 clock cycles for I-class instructions. Two software vendors provided compilers for this machine. For the same benchmark C program, the compilers generated the following instructions and classes. (All numbers are in millions of instructions.) Vendor's Compiler V1 compiler V2 compiler R-class 50 120 J-class 100 80 I-class 80 30 If the hardware manufacturer based its specifications on MIPS (Million Instructions Per Second), which of the two compiler vendors it would favor? Show all your work. [Hints: you might utilize the following equations.] CPU clock cycles = (CPI, C;) i=1